1. Field of the Invention
This invention relates generally to a method of manufacturing semiconductor devices and more specifically, this invention relates to a method of manufacturing advanced sub-half-micron logic and non-volatile integrated circuit semiconductor devices having steep retrograde channel profiles using conventional dopants.
2. Discussion of the Related Art
To achieve the higher performances that are required by the end users of semiconductors, semiconductor manufacturers must provide faster and more complicated circuits on semiconductor chips. In addition, end users of semiconductors have demanded more functions in a smaller chip area. This, for example, has resulted in the requirement to increase the density of transistors on chips in each new generation of semiconductors.
Two of the major goals of MOSFET scaling are to increase the density and the speed of the integrated circuits in which the scaled-down devices are to be used. To increase the density of integrated circuits, the physical dimensions of the integrated circuits have to be reduced, which requires smaller channel lengths and widths. To increase the speed of integrated circuits, there are several parametrics that must be addressed. For example, one such parametric that must be addressed is the MOSFET saturation drain current I.sub.DSAT that must be increased to allow faster charging and discharging of load and parasitic capacitances. The long-channel MOSFET models derived for the pre-submicron long-channel MOSFETs predicted that I.sub.DSAT should continue to increase with a decrease in either the channel length L or the gate oxide thickness t.sub.ox. This seems to imply that only the limitations of process technology, i.e., not device effects, prevent the manufacture of smaller, higher-performing MOSFETs.
However, as process technology improved to the point where devices could be fabricated with gate lengths smaller than approximately 2 .mu.m, MOSFETs began to exhibit phenomena not predicted by the long-channel MOSFET models. Such phenomena are called "short-channel effects." One such unpredicted phenomenon is the effect of gate dimensions on threshold voltage V.sub.T. There are three basic short-channel effects on the threshold voltage of MOSFETs: (1) the short-channel threshold-voltage shift; (2) narrow gate width effects on threshold voltage; and (3) the reverse short-channel threshold voltage shift.
It has been found that as the channel length dimension L is reduced to less than 2 .mu.m, the difference between the threshold voltage predicted by the long-channel models and the actual measured threshold voltage becomes significant. Typically, the threshold voltage decreases as L is reduced. However, in some situations it has been found that threshold voltage initially increases with decreasing channel length, beginning at about L=2-3 .mu.m, contrary to what would be predicted. This phenomenon is called "reverse short channel effect" (RSCE), "V.sub.T roll-up," or "anomalous threshold behavior." After V.sub.T reaches a maximum value due to RSCE, at about 0.7 .mu.m, V.sub.T declines as channel lengths are further decreased. This decline is called "V.sub.T roll-off." It is theorized that the two-dimensional effects that are responsible for V.sub.T roll-off eventually overcome the effects causing V.sub.T roll-up and dominate at the shorter channel lengths. In fact, another observed unexplained short channel phenomenon is that the rate of V.sub.T roll-off with shorter L.sub.eff (effective channel length) is much faster than can be explained by the conventional models of laterally uniform channel doping. There have been different explanations for the roll-up effect; however, while several of the models seem to provide good quantitative agreement with experimental observations of the reverse short-channel effect, a consensus has not been achieved as to the cause of the reverse short-channel effect.
As the channel lengths have continued to decrease and have been scaled to 0.25 .mu.m and below, background and channel doping must be raised to values of 3.times.10.sup.17 ions per cm.sup.2 and higher in order to control the short-channel effects. This leads to reduced mobility and difficulty in obtaining a low threshold. To circumvent these problems, use of vertically, non-uniform channel profiles has been suggested and implemented. It has been shown that non-uniform channel doping results in better short-channel effects, that is, better V.sub.t roll-off characteristics and higher mobility. For best short-channel results, it is desirable to place the peak of the concentration profile as close to the surface as possible while still maintaining a low surface concentration. Because of the difficulty in obtaining a retrograde channel profile utilizing conventional manufacturing methods and conventional dopants, it has been proposed that alternative dopants be used to obtain and maintain the requisite non-uniform channel profile. One such proposal is the use of indium as a channel implant. The article "Indium Channel Implant for Improved Short-Channel Behavior of Submicrometer NMOSFETs" by G. G. Shahidi, Bijan Davari, Thomas J. Bucelot, P. A. Ronsheim, P. J. Coane, S. Pollack, C. R. Blair, B. Clark, and Howard H. Hansen, IEEE ELECTRON DEVICE LETTERS, VOL. 14, NO. 8, August 1993 discusses the benefits of using indium to achieve the desired channel profile and characteristics. The article "Re-examination of Indium implantation for a low power 0.1 .mu.m technology," by P. Bouillon, F. Benistant, T. Skotnicki, G. Guegan, D. Roche, E. Andre, D. Mathiot, S. Tedesco, F. Martin, M. Heitzmann, M. Lerme, and M. Haond, IEDM 95-897, IEEE 1995 suggests that the use of Indium for the NMOS has remained a big concern for such issues as post-implant damage and room temperature freeze-out of the dopants. The latter article discusses a reduction in channel doping in order to enhance carrier mobility, and an increase in the dopant concentration close to half the junction depth in order to control punchthrough and that, in turn, calls for the use of a retrograde doping profile. The article also states that for deep sub-micron devices, conventional dopants can no longer be used to obtain these types of profiles.
Therefore, because of the problems associated with the proposed alternative dopants, what is needed is a method of manufacturing a sub-half-micron semiconductor device with steep retrograde channel profiles using conventional dopants such as boron, phosphorus and arsenic.